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Derived spec
AXI-Lite handshake compliance
Write-strobe alignment
Backpressure when FIFO is full
Interrupt on transfer complete
SMELTR · generating dma_axi_lite.v
Simulation · iter 1
tb_axi_handshake
tb_wstrb_align
tb_backpressure
tb_irq_on_complete
Reflexion · iter 2
▸ patch · assign s_axi_wready = ~fifo_full;
tb_axi_handshake
tb_wstrb_align
✕tb_backpressure
tb_irq_on_complete
Verified design · converged in 2 iterations
dma_axi_lite.v · 4 / 4 checks passing
Program onto silicon
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